PIC programmers for parallel port




Parallel_programmer



Type Chips SW1
PR1
SW2
PR2
SW3
PR3
A. az F. PIC
EPROM
A
A
A
A
A
A
Type Chips SW1
PR1
SW2
PR2
SW3
PR3
A. 1xPIC (RB7) - single PIC card SLAVE(RB7) A A A
B. 1xPIC (RB6) - single PIC card MASTER(RB6) A A B
C. 1xPIC (RB7), 1xEEPROM - Multimac II EEPROM
SLAVE(RB7)
B
A
B
A
B
A
D. 2xPIC (RB6, RB7) - twine PIC card MASTER(RB6)
SLAVE(RB7)
A
A
A
A
B
A
E. 2xPIC (RB6, RB7), 1xEEPROM - quadra EEPROM1
MASTER(RB6)
SLAVE(RB7)
B
A
A
B
A
A
B
B
A
F. 2xPIC (RB6, RB7), 2xEEPROM - quadra


Attention! EEPROM2 can be programmed only in a socket!
EEPROM1
MASTER(RB6)
SLAVE(RB7)

EEPROM2
B
A
A

-
B
A
A

-
B
B
A

-
G. 1xPIC(RB7) - wafer card  PIC A A A
H.1xPIC(RB7), 1xEEPROM - MM2 wafer card EEPROM
PIC
B
A
B
A
B
A
J. 1xPIC(RB7), 1xEEPROM - gold MM2 wafer card
use Phoenix interface for EEPROM
PIC

EEPROM
A

-
A

-
A

-

    Programming other cards (I have not tested):

    Set switch 1 in position A
    Use switch 2 to switch between master/slave chip (RB6 CARDS)
    Use switch 3 to switch between RB7/RB6 cards (RB7 in position A)


  • info_c.htm - this page,
  • uni5_a.bmp - PCB of parallel programmer UNIPROG V-A
  • uni5_as1.bmp - schematic diagram of G.Tait's programmer with 4066
  • uni5_ao1.bmp - layout of components of G.Tait's programmer with 4066
  • uni5_as2.bmp - schematic diagram of G.Tait's programmer with PNP trans.
  • uni5_ao2.bmp - layout of components of G.Tait's programmer with PNP trans.
  • uni5_as3.bmp - schematic diagram of H.Schaer's programmer
  • uni5_ao3.bmp - layout of components of H.Schaer's programmer

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